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3.4 Assembly language interworking using veneers
The assembly language ARM/Thumb interworking method described in Assembly language interworking carried out
all the necessary intermediate processing. There was no requirement for the linker to insert interworking veneers.
This section describes how you can make use of interworking veneers to:
• interwork between assembly language modules
• interwork between assembly language and C or C++ modules.
3.4.1 Assembly-only interworking using veneers
You can write assembly language ARM/Thumb interworking code to make use of interworking veneers generated by
the linker. To do this, you write:
• A caller routine just as any non-interworking routine, using a BL instruction to make the call. A caller routine may
be assembled /interwork or /nointerwork.
• A callee routine using a BX instruction to return. A callee routine must be assembled /interwork.
This is generally only necessary in ARM architecture v4T, or if the caller and callee are widely separated or in
different areas. In ARM architecture v5T, if the caller and callee are sufficiently close together, no veneers are
necessary.
Example of assembly language interworking using veneers
Example 3-5 shows the code to set registers r0 to r2 to the values 1, 2, and 3 respectively. Registers r0 and r2 are
set by the ARM code. r1 is set by the Thumb code. Observe that:
• the code must be assembled with the option -apcs /interwork
• a BX lr instruction is used to return from the subroutine, instead of the usual MOV pc,lr.
Example 3-5
; *****
; arm.s
; *****
AREA Arm,CODE,READONLY ; Name this block of code.
IMPORT ThumbProg
ENTRY ; Mark 1st instruction to call.
ARMProg
MOV r0,#1 ; Set r0 to show in ARM code.
BL ThumbProg ; Call Thumb subroutine.
MOV r2,#3 ; Set r2 to show returned to ARM.
; Terminate execution.
MOV r0, #0x18 ; angel_SWIreason_ReportException
LDR r1, =0x20026 ; ADP_Stopped_ApplicationExit
SWI 0x123456 ; ARM semihosting SWI
END
; *******
; thumb.s
; *******
AREA Thumb,CODE,READONLY
; Name this block of code.
CODE16 ; Subsequent instructions are Thumb.
EXPORT ThumbProg
ThumbProg
MOV r1, #2 ; Set r1 to show reached Thumb code.
BX lr ; Return to ARM subroutine.
END ; Mark end of this file.
Follow these steps to build and link the modules, and examine the interworking veneers:
1. Type armasm arm.s to assemble the ARM code.
2. Type armasm -16 -apcs /interwork thumb.s to assemble the Thumb code.
3. Type armlink arm.o thumb.o -o count to link the two object files.
4. Type armsd count to load the code into the debugger.
5. Type list 0x8000 at the armsd command prompt to list the code. Example 3-6 shows the output.
Example 3-6
Interworking ARM and Thumb
Copyright ?1999 2001 ARM Limited 3-8
- ARM® Developer Suite 1
- Version 1.2 1
- Developer Guide 1
- About this book 2
- ARM publications 3
- Other publications 3
- Feedback 4
- 1 Introduction 5
- Introduction 6
- 1.3 Developing for the ARM 7
- 1.3.5 Writing Code for ROM 8
- 2.1.1 ATPCS variants 9
- 2.1.2 ARM C libraries 9
- • Read-only memory 10
- 2.2 Register roles and names 11
- 2.3 The stack 12
- 2.4 Parameter passing 14
- 2.5 Stack limit checking 15
- 2.6.2 Writing code for ROPI 17
- 2.7.1 Reentrant routines 18
- 2.9 Floating-point options 20
- 3 Interworking ARM and Thumb 22
- 3.1 About interworking 22
- Interworking ARM and Thumb 23
- 3.2.3 Example ARM header 24
- Building the example 25
- 3.2.4 ARM architecture v5T 25
- 3.2.5 Labels in Thumb code 26
- C interworking example 27
- 5. Type go to run the code 31
- String copying example 33
- Operand expressions 33
- Physical registers 33
- 4.1.4 Usage 35
- 4.1.5 Examples 36
- Dot product 37
- Long multiplies 37
- • LDRB/STRB for char 39
- • LDR/STR for int 39
- C++ calling conventions 42
- C++ data types 42
- Symbol name mangling 43
- 4.4.3 Examples 43
- Calling C from C++ 44
- Calling C++ from C 45
- Handling Processor Exceptions 48
- • the address of the handler 53
- 5.4 SWI handlers 55
- Nested SWIs in C and C++ 57
- 5.5 Interrupt handlers 61
- • Single-channel DMA transfer 63
- • Dual-channel DMA transfer 63
- • Interrupt prioritization 63
- • Context switch 63
- Interrupt prioritization 64
- Context switch 65
- 5.6 Reset handlers 67
- 5.8 Prefetch Abort handler 69
- 5.9 Data Abort handler 70
- • A single extended handler 71
- • Several chained handlers 71
- Handling the exception 72
- 5.11.2 The return address 72
- FIQ and IRQ handlers 73
- Prefetch Abort handlers 73
- Data Abort handlers 73
- 5.12 System mode 75
- 6 Writing Code for ROM 76
- 6.2.1 ROM at 0x0 77
- 6.2.2 RAM at 0x0 77
- Implementing RAM at 0x0 77
- System decoder 78
- 6.3 Initializing the system 79
- 6.4.1 Memory map 81
- 6.4.2 Sample code 82
- • five execution regions: 83
- 6.5.3 Sample code 84
- 6.5.4 Building the example 88
- Using the CodeWarrior IDE 89
- Using the command line 89
- 6.6.1 Memory map 90
- 6.6.3 Initialization code 91
- 6.6.4 Building the example 91
- 6.7.1 Memory map 93
- 6.7.2 Building the example 93
- 6.7.3 Sample code 93
- 6.8.1 Memory map 97
- 6.8.2 Building the example 97
- 6.8.4 Sample code 98
- 6.9.2 Using unions 100
- Using an array of shorts 100
- Using a struct 100
- 6.9.4 Using scatter loading 101
- 6.9.5 Code efficiency 102
- 6.10 Troubleshooting 103
- Writing Code for ROM 104
- Code (or read-only) segments 105
- Data (or read-write) segments 105
- Debug data 105
- 7.1.1 About caches 106
- ARMulator Pagetable model 106
- 7.1.4 Cache performance 107
- 7.3 Memory protection units 109
- 7.4 Configuring a PU 110
- 7.5 Memory management units 113
- 7.6 Configuring an MMU 115
- 7.7 Tightly coupled memory 117
- 7.7.3 ARM966E-S warm reset 118
- Debug Communications Channel 120
- 8.4 Target transfer of data 123
- • Using armsd 125
- • Using AXD 125
- Issuing commands 126
- Using AXD 126
- 8.7 Access from Thumb state 129
- 8.8 Semihosting 130
- Glossary 131
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