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3 Interworking ARM and Thumb
This chapter explains how to change between ARM state and Thumb state when writing code for processors that
implement the Thumb instruction set. It contains the following sections:
• About interworking
• Assembly language interworking
• C and C++ interworking and veneers
• Assembly language interworking using veneers.
3.1 About interworking
You can mix ARM and Thumb code as you wish, provided that the code conforms to the requirements of the
ARM/Thumb Procedure Call Standard. The ARM compilers always create code that conforms to this standard. If you
are writing ARM assembly language modules you must ensure that your code conforms.
The ARM linker detects when an ARM function is being called from Thumb state, or a Thumb function is being called
from ARM state. The ARM linker alters call and return instructions, or inserts small code sections called veneers, to
change processor state as necessary.
ARM architecture v5T provides methods of changing processor state without using any extra instructions. There is
normally no cost associated with interworking on ARM architecture v5T processors.
If you are linking several source files together, all your files must use compatible ATPCS options. If incompatible
options are detected, the linker will produce an error message.
3.1.1 When to use interworking
When you write code for a Thumb-capable ARM processor, you will probably write most of your application to run in
Thumb state. This gives the best code density. With 8-bit or 16-bit wide memory, it also gives the best performance.
However, you might want parts of your application to run in ARM state for reasons such as:
Speed
Some parts of an application might be speed critical. These sections might be more efficient
running in ARM state than in Thumb state. In some circumstances, a single ARM instruction can
do more than the equivalent Thumb instruction.
Some systems include a small amount of fast 32-bit memory. ARM code can be run from this
without the overhead of fetching each instruction from 8-bit or 16-bit memory.
Functionality
Thumb instructions are less flexible than their ARM equivalents. Some operations are not possible
in Thumb state. For example, you cannot enable or disable interrupts, or access coprocessors. A
state change is required in order to carry out these operations.
Exception handling
The processor automatically enters ARM state when a processor exception occurs. This means
that the first part of an exception handler must be coded with ARM instructions, even if it re-enters
Thumb state to carry out the main processing of the exception. At the end of such processing, the
processor must be returned to ARM state to return from the handler to the main application.
Standalone Thumb programs
A Thumb-capable ARM processor always starts in ARM state. To run simple Thumb assembly
language programs under the debugger, add an ARM header that carries out a state change to
Thumb state and then calls the main Thumb routine. See Example ARM header for an example.
3.1.2 Using the /interwork option
The option -apcs /interwork is available for all compilers and assemblers. If you set this option:
• The compiler or assembler records an interworking attribute in the object file.
• The linker provides interworking veneers for subroutine entry.
• In assembly language, you must write function exit code that returns to the instruction set state of the caller, for
example BX LR.
• In C or C++, the compiler creates function exit code that returns to the instruction set state of the caller
• In C or C++, the compiler uses BX instructions for indirect or virtual calls.
Use the /interwork option if your object file contains:
• Thumb subroutines that might need to return to ARM code
• ARM subroutines that might need to return to Thumb code
Interworking ARM and Thumb
Copyright ?1999 2001 ARM Limited 3-1
- ARM® Developer Suite 1
- Version 1.2 1
- Developer Guide 1
- About this book 2
- ARM publications 3
- Other publications 3
- Feedback 4
- 1 Introduction 5
- Introduction 6
- 1.3 Developing for the ARM 7
- 1.3.5 Writing Code for ROM 8
- 2.1.1 ATPCS variants 9
- 2.1.2 ARM C libraries 9
- • Read-only memory 10
- 2.2 Register roles and names 11
- 2.3 The stack 12
- 2.4 Parameter passing 14
- 2.5 Stack limit checking 15
- 2.6.2 Writing code for ROPI 17
- 2.7.1 Reentrant routines 18
- 2.9 Floating-point options 20
- 3 Interworking ARM and Thumb 22
- 3.1 About interworking 22
- Interworking ARM and Thumb 23
- 3.2.3 Example ARM header 24
- Building the example 25
- 3.2.4 ARM architecture v5T 25
- 3.2.5 Labels in Thumb code 26
- C interworking example 27
- 5. Type go to run the code 31
- String copying example 33
- Operand expressions 33
- Physical registers 33
- 4.1.4 Usage 35
- 4.1.5 Examples 36
- Dot product 37
- Long multiplies 37
- • LDRB/STRB for char 39
- • LDR/STR for int 39
- C++ calling conventions 42
- C++ data types 42
- Symbol name mangling 43
- 4.4.3 Examples 43
- Calling C from C++ 44
- Calling C++ from C 45
- Handling Processor Exceptions 48
- • the address of the handler 53
- 5.4 SWI handlers 55
- Nested SWIs in C and C++ 57
- 5.5 Interrupt handlers 61
- • Single-channel DMA transfer 63
- • Dual-channel DMA transfer 63
- • Interrupt prioritization 63
- • Context switch 63
- Interrupt prioritization 64
- Context switch 65
- 5.6 Reset handlers 67
- 5.8 Prefetch Abort handler 69
- 5.9 Data Abort handler 70
- • A single extended handler 71
- • Several chained handlers 71
- Handling the exception 72
- 5.11.2 The return address 72
- FIQ and IRQ handlers 73
- Prefetch Abort handlers 73
- Data Abort handlers 73
- 5.12 System mode 75
- 6 Writing Code for ROM 76
- 6.2.1 ROM at 0x0 77
- 6.2.2 RAM at 0x0 77
- Implementing RAM at 0x0 77
- System decoder 78
- 6.3 Initializing the system 79
- 6.4.1 Memory map 81
- 6.4.2 Sample code 82
- • five execution regions: 83
- 6.5.3 Sample code 84
- 6.5.4 Building the example 88
- Using the CodeWarrior IDE 89
- Using the command line 89
- 6.6.1 Memory map 90
- 6.6.3 Initialization code 91
- 6.6.4 Building the example 91
- 6.7.1 Memory map 93
- 6.7.2 Building the example 93
- 6.7.3 Sample code 93
- 6.8.1 Memory map 97
- 6.8.2 Building the example 97
- 6.8.4 Sample code 98
- 6.9.2 Using unions 100
- Using an array of shorts 100
- Using a struct 100
- 6.9.4 Using scatter loading 101
- 6.9.5 Code efficiency 102
- 6.10 Troubleshooting 103
- Writing Code for ROM 104
- Code (or read-only) segments 105
- Data (or read-write) segments 105
- Debug data 105
- 7.1.1 About caches 106
- ARMulator Pagetable model 106
- 7.1.4 Cache performance 107
- 7.3 Memory protection units 109
- 7.4 Configuring a PU 110
- 7.5 Memory management units 113
- 7.6 Configuring an MMU 115
- 7.7 Tightly coupled memory 117
- 7.7.3 ARM966E-S warm reset 118
- Debug Communications Channel 120
- 8.4 Target transfer of data 123
- • Using armsd 125
- • Using AXD 125
- Issuing commands 126
- Using AXD 126
- 8.7 Access from Thumb state 129
- 8.8 Semihosting 130
- Glossary 131
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