ARM VERSION 1.2 Guide de l'utilisateur télécharger pdf (Page 52)

5.3 Installing an exception handler

Any new exception handler must be installed in the vector table. When installation is complete, the new handler

executes whenever the corresponding exception occurs.

Exception handlers can be installed in two ways:

Branch instruction

This is the simplest way to reach the exception handler. Each entry in the vector table contains a

branch to the required handler routine. However, this method does have a limitation. Because the

branch instruction only has a range of 32MB relative to the pc, with some memory organizations

the branch may be unable to reach the handler.

Load pc instruction

With this method, the program counter is forced directly to the handler address by:

1. Storing the absolute address of the handler in a suitable memory location (within 4KB of the

vector address).

2. Placing an instruction in the vector that loads the program counter with the contents of the

chosen memory location.

5.3.1 Installing the handlers at reset

If your application does not rely on the debugger or debug monitor to start program execution, you can load the

vector table directly from your assembly language reset (or startup) code.

If your ROM is at location 0x0 in memory, you can simply have a branch statement for each vector at the start of

your code. This could also include the FIQ handler if it is running directly from 0x1C (see Interrupt handlers).

Example 5-1 shows code that sets up the vectors if they are located in ROM at address zero. You can substitute

branch statements for the loads.

Example 5-1

Vector_Init_Block

LDR PC, Reset_Addr

LDR PC, Undefined_Addr

LDR PC, SWI_Addr

LDR PC, Prefetch_Addr

LDR PC, Abort_Addr

NOP ;Reserved vector

LDR PC, IRQ_Addr

LDR PC, FIQ_Addr

Reset_Addr DCD Start_Boot

Undefined_Addr DCD Undefined_Handler

SWI_Addr DCD SWI_Handler

Prefetch_Addr DCD Prefetch_Handler

Abort_Addr DCD Abort_Handler

DCD 0 ;Reserved vector

IRQ_Addr DCD IRQ_Handler

FIQ_Addr DCD FIQ_Handler

You must have ROM at location 0x0 on reset. Your reset code can remap RAM to location 0x0. Before doing this, it

must copy the vectors (plus the FIQ handler if required) down from an area in ROM into the RAM.

In this case, you must use an LDR pc instruction to address the reset handler, so that the reset vector code can be

position independent.

Example 5-2 copies down the vectors given in Example 5-1 to the vector table in RAM.

Example 5-2

MOV r8, #0

ADR r9, Vector_Init_Block

LDMIA r9!,{r0-r7} ;Copy the vectors (8 words)

STMIA r8!,{r0-r7}

LDMIA r9!,{r0-r7} ;Copy the DCD'ed addresses

STMIA r8!,{r0-r7} ;(8 words again)

Alternatively, you can use the scatter-loading mechanism to define the load and execution address of the vector

table. In that case, the C library copies the vector table for you (see Chapter 6 Writing Code for ROM).

5.3.2 Installing the handlers from C

Handling Processor Exceptions

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