ARM VERSION 1.2 Guide de l'utilisateur Page 21

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Format of VFP values
Single-precision and double-precision values conform to the IEEE 754 standard formats. Double-precision values are
treated as true 64-bit values:
in little-endian mode, the more significant word of a two-word double-precision value, containing the exponent,
has the higher address
in big-endian mode, the more significant word has the lower address.
Note
Little-endian double-precision values in VFP are pure little-endian. This is different from FPA architecture.
Big-endian double-precision values are the same, pure big-endian, in both VFP and FPA architectures.
IEEE rounding modes and exception enable flags
The ATPCS does not specify any constraint on the state of these on entry to, or exit from, conforming routines.
2.9.2 The FPA architecture
The FPA architecture has eight floating-point registers, f0-f7. Each register can hold a single-precision,
double-precision, or extended-precision value.
Register usage with FPA
You can use the first four floating-point registers, f0-f3:
to pass floating-point values into a routine
to pass floating-point results out of a routine
as scratch registers within a routine.
To comply with ATPCS, if you use floating-point registers f4-f7 within a routine, you must save their values on entry
and restore them before exit. You can save them using a single SFM instruction and restore them using a single LFM
instruction. Each value saved occupies three words.
Format of FPA values
Single-precision and double-precision values conform to the IEEE 754 standard formats. The most significant word
of a floating-point value, containing the exponent, has the lowest memory address. This is the same whether the byte
order within words is big-endian or little-endian.
Note
Little-endian double-precision values are neither pure little-endian nor pure big-endian.
IEEE rounding modes and exception enable flags
The ATPCS does not specify any constraint on the state of these on entry to, or exit from, conforming routines.
2.9.3 No floating-point hardware
The only difference between softVFP and softFPA is the order of words in double-precision values in little-endian
mode (see Format of VFP values and Format of FPA values).
If you specify -fpu none, you cannot use floating-point values.
Register usage with softVFP and softFPA
Each floating-point argument is converted to a bit pattern in one or two integer words as if by storing to memory. The
resulting integer values are passed as described in Parameter passing.
A single-precision floating-point result is returned as a bit pattern in r0.
A double-precision floating-point result is returned in r0 and r1. r0 contains the word corresponding to the
lower-addressed word of the representation of the value in memory.
2.9.4 softVFP+VFP
Thumb code cannot pass floating-point values in floating-point registers, as Thumb does not have coprocessor
instructions.
If you have a VFP coprocessor and wish to use floating-point routines from Thumb code, select the -fpu
softVFP+VFP option.
This instructs the compilers to generate code using the same parameter passing rules as for -fpu softVFP. The C
library floating-point routines use VFP instructions from ARM state.
Using the Procedure Call Standard
Copyright ?1999 2001 ARM Limited 2-13
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