ARM Cortex R4F Manuel d'utilisateur Page 31

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© G.N. Khan ARM Processors/Cores – EE8205: Embedded Computer Systems Page: 31
SSAT: Saturate Instruction
Consider two numbers 0xFFFF FFFE and 0×0000 0002. A 32-bit mathematical
addition would result in 0×1 0000 0001 which contain 9 hex digits or 33 binary
bits. If the same arithmetic is done in a 32 bit processor ideally the carry flag will
be set and the result in the register will be 0×0000 0001.
If the operation was done by any comparison instruction this would not cause any
harm but during any addition operation this may lead to unpredictable results if the
code is not designed to handle such operations. Saturate arithmetic says that when
the result crosses the extreme limit the value should be maintained at the respective
maximum/minimum (in our case result will be maintained at 0xFFFF FFFF which
is the largest 32-bit number).
Saturate instructions are very useful in implementing certain DSP algorithms like
audio processing where we have a cutoff high in the amplitude. For instance the
highest amplitude is expressed by a 32-bit value and if my audio filter gives an
output more than this I need not programatically monitor the result. Rather the
value automatically saturates to the max limit.
Also a new flag field called ‘Q’ has been added to the ARM processor to show us
if there had been any such saturation taken place or the natural result itself was the
maximum
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