ARM ARM7TDMI Fiche technique

Advanced RISC MachinesARMDocument Number:ARM DDI 0029EIssued: August 1995Copyright Advanced RISC Machines Ltd (ARM) 1995All rights reservedARM 7TDMID

IntroductionARM7TDMI Data SheetARM DDI 0029E1-2Open Access1.1 IntroductionThe ARM7TDMI is a member of the Advanced RISC Machines (ARM) family ofgenera

IntroductionARM7TDMI Data SheetARM DDI 0029E1-3Open Access1.2.2 THUMB’s AdvantagesTHUMB instructions operate with the standard ARM register configurati

IntroductionARM7TDMI Data SheetARM DDI 0029E1-4Open Access1.3 ARM7TDMI Block Diagram Figure 1-1: ARM7TDMI block diagram••Scan Chain 0A[31:0]CoreScan C

IntroductionARM7TDMI Data SheetARM DDI 0029E1-5Open Access1.4 ARM7TDMI Core Diagram Figure 1-2: ARM7TDMI corenRESETnMREQSEQABORTnIRQnFIQnRWLOCKnCPICPA

IntroductionARM7TDMI Data SheetARM DDI 0029E1-6Open Access1.5 ARM7TDMI Functional Diagram Figure 1-3: ARM7TDMI functional diagramLOCKA[31:0]ABORTMemor

ARM7TDMI Data SheetARM DDI 0029E2-1111Open AccessSignal DescriptionThis chapter lists and describes the signals for the ARM7TDMI.2.1 Signal Descriptio

Signal DescriptionARM7TDMI Data SheetARM DDI 0029E2-2Open Access2.1 Signal DescriptionThe following table lists and describes all the signals for the

Signal DescriptionARM7TDMI Data SheetARM DDI 0029E2-3Open AccessAPEAddress pipeline enable.IC When HIGH, this signal enables the address timing pipeli

Signal DescriptionARM7TDMI Data SheetARM DDI 0029E2-4Open AccessCOMMTXCommunications ChannelTransmitO When HIGH, this signal denotes that the comms ch

Signal DescriptionARM7TDMI Data SheetARM DDI 0029E2-5Open AccessDBGRQIInternal debug request04 This signal represents the debug request signal which i

iiARM7TDMI Data SheetARM DDI 0029EOpen AccessKey:Open Access No confidentialityTo enable document tracking, the document number has two codes:Major re

Signal DescriptionARM7TDMI Data SheetARM DDI 0029E2-6Open AccessEXTERN1External input 1.IC This is an input to the ICEBreaker logic in the ARM7TDMI wh

Signal DescriptionARM7TDMI Data SheetARM DDI 0029E2-7Open AccessMCLKMemory clock input.IC This clock times all ARM7TDMI memory accesses and internalop

Signal DescriptionARM7TDMI Data SheetARM DDI 0029E2-8Open AccessnMREQNot memory request.04 This signal, when LOW, indicates that the processor require

Signal DescriptionARM7TDMI Data SheetARM DDI 0029E2-9Open AccessnWAITNot wait.IC When accessing slow peripherals, ARM7TDMI can be made towait for an i

Signal DescriptionARM7TDMI Data SheetARM DDI 0029E2-10Open AccessSHCLKBSBoundary scan shift clock,phase 104 This control signal is provided to ease th

Signal DescriptionARM7TDMI Data SheetARM DDI 0029E2-11Open AccessVDDPower supply.P These connections provide power to the device.VSSGround.P These con

Signal DescriptionARM7TDMI Data SheetARM DDI 0029E2-12Open Access

ARM7TDMI Data SheetARM DDI 0029E3-1111Open AccessProgrammer’s ModelThis chapter describes the two operating states of the ARM7TDMI.3.1 Processor Opera

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-2Open Access3.1 Processor Operating StatesFrom the programmer’s point of view, the ARM7TDMI can be

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-3Open Access3.3.1 Big endian formatIn Big Endian format, the most significant byte of a word is sto

ARM7TDMI Data SheetARM DDI 0029EContents-i111Open Access1 Introduction 1-11.1 Introduction 1-21.2 ARM7TDMI Architecture 1-21.3 ARM7TDMI Block Diagram

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-4Open Access3.6 Operating ModesARM7TDMI supports seven modes of operation:User (usr): The normal A

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-5Open AccessFIQ mode has seven banked registers mapped to R8-14 (R8_fiq-R14_fiq). In ARMstate, many

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-6Open Access3.7.2 The THUMB state register setThe THUMB state register set is a subset of the ARM

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-7Open Access• THUMB state LR maps onto ARM state R14• The THUMB state Program Counter maps onto th

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-8Open Access3.8 The Program Status RegistersThe ARM7TDMI contains a Current Program Status Registe

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-9Open AccessInterrupt disable bitsThe I and F bits are the interrupt disable bits. When set,these

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-10Open Access3.9 ExceptionsExceptions arise whenever the normal flow of a program has to be halted

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-11Open Access3.9.3 Exception entry/exit summary➲Table 3-2: Exception entry/exit summarises the PC

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-12Open AccessFIQ may be disabled by setting the CPSR’s F flag (but note that this is not possiblefr

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-13Open AccessAfter fixing the reason for the abort, the handler should execute the followingirrespe

ContentsARM7TDMI Data SheetARM DDI 0029EContents-iiOpen Access4 ARM Instruction Set 4-14.1 Instruction Set Summary 4-24.2 The Condition Field 4-54.3 B

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-14Open Access3.9.10 Exception prioritiesWhen multiple exceptions arise at the same time, a fixed pr

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-15Open Access3.11 ResetWhen the nRESET signal goes LOW, ARM7TDMI abandons the executing instructio

Programmer’s ModelARM7TDMI Data SheetARM DDI 0029E3-16Open Access

ContentsARM7TDMI Data SheetARM DDI 0029EContents-iiiOpen Access5.18 Format 18: unconditional branch 5-395.19 Format 19: long branch with link 5-405.20

ContentsARM7TDMI Data SheetARM DDI 0029EContents-ivOpen Access9 ICEBreaker Module 9-19.1 Overview 9-29.2 The Watchpoint Registers 9-39.3 Programming B

ContentsARM7TDMI Data SheetARM DDI 0029EContents-vOpen Access12 AC Parameters 12-112.1 Introduction 12-212.2 Notes on AC Parameters 12-11

ContentsARM7TDMI Data SheetARM DDI 0029EContents-viOpen Access

ARM7TDMI Data SheetARM DDI 0029E1-1111Open AccessIntroductionThis chapter introduces the ARM7TDMI architecture, and shows block, core, andfunctional d