Arm VERSION 1.2 Manuel d'utilisateur télécharger pdf (Page 256)

100

101

Vector Floating-point Programming

6.7.2 FADD and FSUB

Floating-point add and subtract.

FADD

and

FSUB

can be scalar, vector, or mixed (see Vector and scalar operations on

page 6-7).

Syntax

FADD<precision>{cond} Fd, Fn, Fm

FSUB<precision>{cond} Fd, Fn, Fm

where:

must be either

for single-precision, or

for double-precision.

cond

is an optional condition code (see VFP and condition codes on page 6-8).

is the VFP register for the result.

is the VFP register holding the first operand.

is the VFP register holding the second operand.

The precision of

and

must match the precision specified in

Usage

The

FADD

instruction adds the values in

and

and places the result in

The

FSUB

instruction subtracts the value in

from the value in

and places the result

Exceptions

FADD

and

FSUB

instructions can produce Invalid Operation, Overflow, or Inexact

exceptions.

Examples

FSUBSEQ s2, s4, s17

FADDDGT d4, d0, d12

FSUBD d0, d0, d12

1 2 ... 251 252 253 254 255 256 257 258 259 260 261 ... 359 360

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Arm VERSION 1.2 Manuel d'utilisateur Page 256

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