ARM Cortex-M3 Manuel d'utilisateur télécharger pdf (Page 31)

31



Store buffer allows STR instruction to finish before store

cycle completes on the bus



Back

-

to

-

back STR instructions pipeline on the AHB

-

Lite bus

-

Also works for LDR

-

STR

-

LDR

-

STR

Cycle

Operation

ADD

SUB

ORR

STR

EOR

STR

1

2

3

4

5

6

7

8

9

F

D

E

F

D

E

F

E

F

D

Ea

F

D

Ea

D

F

D

E

F

-

Fetch

D

-

Decode

E

–

Execute

S

-

Stall

Ea

–

Execute / STR address phase

Ed

–

STR data phase

Ed

STR

-

STR Pipeline Example

Ed

1 2 ... 26 27 28 29 30 31 32 33 34 35 36 ... 40 41

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